Achievements
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Received Best Paper Award in International Conference ICOT-2004.
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Senior Research Fellow on CSIR sponsored project.
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Distinction in "Who's Who in the World", published by Marquis in Nov. 2009 (USA).
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Distinction in "TOP 100 ENGINEERS 2010", published by International Biographical Centre, St Thomas' place, GREART BRITAIN.
Experience
18years Teaching/Research experience in the area of
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Design and simulation of High-speed digital and analog circuits,
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Sub-threshold Logic Design, Static Random Access memory
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Ultra Low Power, Adiabatic Logic for Portable Applications
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Novel Semiconductor Devices, FinFETs,
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Deposition and Characterization of low-K and High-K dielectric material
Professional / Technical Experience
Place: North Maharashtra University, Jalgaon, (MS), INDIA
a) General:
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Clean room design and maintenance.
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Purchase and maintenance of sophisticated equipments.
b) Designing:
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Optimization of various design parameters of Photonic Crystal Structure using Transfer Matrix Method.
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Optimizations of various design parameters of Omnidirectional Reflector using Transfer Matrix Method
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Verilog, VHDL modeling / designing and logic verification. Complex ASIC/ SOC verification using HDL, Tanner Tools, Cadence Virtuoso
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CMOS layout designing simulation and analysis, CMOS design,
c) Characterization:
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Refractive index, thickness and stress measurement using Ellipsometery.
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Surface morphology and thickness measurement using Optical Microscopy.
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Chemical bonding structure analysis using FTIR spectroscopy.
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Surface morphology analysis using Scanning Electron Microscopy.
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Compositional analysis using Energy Dispersive Analysis of X ray.
d) Semiconductor optoelectronic devices on silicon material and their fabrication techniques:
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Pre-treatment of the wafer
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Chemical etching
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Oxide growth by TEOS-CVD
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Photolithography