Admission Query
✖

Admission Inquiry

Captcha
loder
Dr. Shasanka Sekhar Rout

Dr. Shasanka Sekhar Rout

  • Assistant Professor
    Institute of Engineering & Technology

  • Department

    Department of Electronics & Communication

  • Contact Details:

    Email : [email protected]

    Contact Number :7008958184

  • Experience

    11 years Teaching/Research experience in the field.

  • Qualifications

    • PhD in ECE (VLSI), 2019, from Veer Surendra Sai University of Technology, Burla (formerly known as University College of Engineering (UCE), Burla). Title: DESIGN OF CMOS FREQUENCY CONVERSION CIRCUIT FOR RECEIVER FRONT END.
    • In 2014, M.Tech. (VLSI Signal Processing) from the Dept. of ECE, Veer Surendra Sai University of Technology, Burla (formerly known as University College of Engineering (UCE), Burla) with Ist division.

  • Postgraduate

    Thesis Supervised

  • Awarded/ Completed-

    Working-

  • Undergraduate

    Thesis Supervised

  • Awarded/ Completed-

    Ongoing-

Journals

  • 01 S. S. Rout, R. K. Patjoshi, S. Garnaik and R. Rout, “Comparative Analysis of Heterogeneous Adders: Evaluating Performance across 12-bit, 14-bit, and 16-bit Configurations,” Journal of Information Assurance and Security, Sciendo, Vol. 19, no. 4, pp. 136-145, Feb. 2025.
  • 02 R. Rout, P. Parida, M. K. Panda and S. S. Rout, “Saliency Induced Fusion for Skin Lesion Detection,” International Journal of Computer Information Systems and Industrial Management Applications, Cerebration Science Publishing, Vol. 16, pp. 696-710, July 2024.
  • 03 S. Garnaik, S. S. Rout and K. Sethi, “FPGA Implementation and Detection of a Simple Vowel-like Speech Algorithm,” Journal of Information Assurance and Security, MIR Labs, USA, Vol. 17, no. 5, pp. 136-143, May 2022.
  • 04 A. Tiwary, S. S. Rout and B. Behera, “Design and Analysis of Various Characteristics of a MEMS-Based PIB/CNT/LiNbO3 Multilayered SAW Sensor for CO2 Gas Detection,” Transactions on Electrical and Electronic Materials, Springer, Vol. 23, pp. 609-617, Mar. 2022, doi: 10.1007/s42341-022-00392-x.
  • 05 S. S. Rout, S. K. Mohapatra and K. Sethi, “Design of 2.4 GHz Improved Current Reuse Gilbert Mixer with Source Degeneration Technique,” Wireless Personal Communications, Springer, Vol. 122, pp. 3875–3887, Feb. 2022, doi: 10.1007/s11277-021-09115-6.
  • 06 R. K. Patjoshi, R. Panigrahi and S. S. Rout, ”A Hybrid Fuzzy with Feedback Integral Phase Locked Loop based Control Strategy for Unified Power Quality Conditioner,” Transactions of the Institute of Measurement and Control, SAGE publications, Vol. 43, no. 1, pp. 122-136, 2021, doi: 10.1177/0142331220933760.
  • 07 S. S. Rout, S. Acharya and K. Sethi, “Design of a good oscillation frequency and moderate phase noise current mirror VCO,” Procedia Computer Science, Elsevier, IITM, Kerala, India, vol. 171, pp. 878-886, Jun. 2020, doi: 10.1016/j.procs.2020.04.095.
  • 08 S. S. Rout and R. K. Patjoshi, “A Low Phase Noise Active-Q Enhanced Voltage Controlled Oscillator,” IEEE VLSI Circuits & Systems Letter, India, vol. 6. no. 2, pp. 1-6, May 2020.
  • 09 N. Sowmya, S. S. Rout and R. K. Patjoshi, “VLSI Implementation in Biomedical Applications: A Review,” International Journal of Computer Information Systems and Industrial Management Applications, MIR Lab, USA, Vol. 12, pp. 155-167, May 2020.
  • 10 S. S. Rout and K. Sethi, “DTMOS based Gilbert mixer design for MICS receiver using current source helpers and switched biasing technique,” Sadhana, Springer, India, vol. 45. no. 1, pp. 1-7, Jan. 2020, doi.org/10.1007/s12046-019-1236-4.
  • 11 S. S. Rout, S. K. Mohapatra and K. Sethi, “Design of cascode mixer based on bulk injection and switched biasing techniques in 180 nm CMOS process for a high performance receiver front end,” Journal of Low Power Electronics (JOLPE), American Scientific Publishers, US vol. 14, no. 1, pp. 49-56, Mar. 2018, doi.org/10.1166/jolpe.2018.1527.
  • 12 S. S. Rout, S. Acharya and K. Sethi, “A low phase noise gm-boosted DTMOS VCO design in 180 nm CMOS technology,” Karbala International Journal of Modern Science, Elsevier, Iraq, vol. 4, no. 2, pp. 228-236, Mar. 2018, doi.org/10.1016/j.kijoms.2018.03.001.
  • 13 S. S. Rout and K. Sethi, “A high gain, low power and low noise down conversion mixer using 0.18 μm CMOS process,” Modelling, Measurement and Control Series A. General Physics and Electrical Applications, AMSE, France, vol. 90, no. 4, pp. 353-367, July. 2017.
  • 14 S. S. Rout and K. Sethi, “A high gain and low noise CMOS Gilbert mixer with improved linearity based on MGTR and switched biasing technique,” ICTACT Journal on Microelectronics, ICT Academy of Tamil Nadu (ICTACT), vol. 2, no. 4, pp. 311-314, Jan. 2017, doi: 10.21917/ijme.2016.0054.
  • 15 N. Sowmya and S. S. Rout, “A Case Study on Energy Conservation and Management,” Seas Transactions, vol. 1, no. 1, 2022.

Book Chapters

  • 01 S. K. Samantaray and S. S. Rout, “Exploring robotics technology for health care applications,” Book Chapter, Artificial Intelligence for Internet of Things, CRC Press Taylor & Francis, pp. 1-14, Nov. 2022, doi.org/10.1201/9781003335801-16.
  • 02 S. S. Rout, S. Mahapatro, G. Jayaswal and M. Hooda, “Low‐Power Integrated Circuit Smart Device Design,” Book Chapter, Intelligent Green Technologies for Sustainable Smart Cities, Wiley, pp. 227-246, Aug. 2022, doi.org/10.1002/9781119816096.ch11.
  • 03 S. K. Samantaray and S. S. Rout, “AI Techniques Applied to Wind Energy,” Book Chapter, Introduction to AI techniques for Renewable Energy System, CRC Press Taylor & Francis, pp. 309-324, Nov. 2021.
  • 04 N. Sowmya, S. S. Rout and R. K. Patjoshi, “Implementation of Ultra Low-power Electronics for Biomedical Applications,” Book Chapter, Electronic Devices, Circuits, and Systems for Biomedical Applications, Elsevier, pp. 153-176, Apr. 2021, doi: 10.1016/B978-0-323-85172-5.00004-6.
  • 05 A. Tiwary and S. S. Rout, “MEMS Devices and Thin Film Based Sensor Applications,” Book Chapter, Electrical and Electronic Device, Circuits and Materials: Design and Applications, CRC Press Taylor & Francis, pp. 245-262, Mar. 2021, doi: 10.1201/9781003097723.
  • 06 S. S. Rout and S. Mahapatro, “Introduction to Hardware Description Languages,” Book Chapter, Advanced VLSI Design and Testability Issues, CRC Press Taylor & Francis, pp. 67-92, Aug. 2020, doi: 10.1201/9781003083436-4.
  • 07 A. K. Hota, S. S. Rout and K. Sethi, “Active Inductor based VCO for Wireless Communication,” Book Chapter, Advanced VLSI Design and Testability Issues, CRC Press Taylor & Francis, pp. 311-323, Aug. 2020, doi: 10.1201/9781003083436-18.

Proceedings

  • 01 N. Sowmya and S. S. Rout, “A Review on VLSI Implementation in Biomedical Application,” Innovations in Bio-Inspired Computing and Applications (IBICA-2019), Springer series Advances in Intelligent and Soft Computing, vol. 1180, GIET University, Gunupur, India, pp. 130-138, Aug. 2020, doi: 10.1007/978-3-030-49339-4_14.
  • 02 P. Mishra, S. S. Rout, G. Palai and L. Spandana, “Comparative Analysis of a Dispersion Compensating Fiber Optic Link using FBG Based on Different Grating Length and Extinction Ratio for Long Haul Communication,” Innovations in Bio-Inspired Computing and Applications (IBICA-2019), Springer series Advances in Intelligent and Soft Computing, vol. 1180, GIET University, Gunupur, India, pp. 139-147, Aug. 2020, doi: 10.1007/978-3-030-49339-4_15.
  • 03 S. S. Rout, S. Acharya and K. Sethi, “Design of a low power and low phase noise VCO using active resistor and DTMOS,” Proceedings on Advances in Electrical Control and Signal Systems (AECSS-2019), Springer LNEE Book Series, vol. 665, ITER, BBSR, India, pp. 671-679, Jul. 2020, doi.org/10.1007/978-981-15-5262-5_50.
  • 04 S. Mahapatro and S. S. Rout, “FPGA implementation of 16-Bit and 32-bit heterogeneous adders,” Proceedings on Advances in Electrical Control and Signal Systems (AECSS-2019), Springer LNEE Book Series, vol. 665, ITER, BBSR, India, pp. 679-689, Jul. 2020, doi.org/10.1007/978-981-15-5262-5_35.
  • 01 G. Sahu, B. Panigrahi and S. S. Rout, “Design of Low Power Dynamic Threshold MOSFET (DTMOS) Push-Pull Inverter,” International Conference on Smart and Sustainable Technologies (ICSST-2021), Springer, GIET University, Gunupur, India, pp. 231–237, Jul. 2022, doi.org/10.1007/978-981-19-2277-0_21.
  • 02 S. K. Samantaray and S. S. Rout, “Design and Development of a Di-wheel Multipurpose Robot for Smart Agriculture Application,” International Conference on Smart and Sustainable Technologies (ICSST-2021), Springer, GIET University, Gunupur, India, pp. 373–379, Jul. 2022, doi.org/10.1007/978-981-19-2277-0_35.
  • 03 S. Garnaik, S. S. Rout and K. Sethi, “A Simplified Vowel-like Speech Detection Method and its FPGA Implementation,” 13th World Congress on Nature and Biologically Inspired Computing (NaBIC 2021), Springer, MIR Labs, USA, pp. 575-585, Feb. 2022.
  • 04 A. Patnaik, A. Panigrahy, R. K. Patjoshi and S. S. Rout, “Design and Implementation of Optimized Parameter Based Operational Amplifier for High Speed Analog Signal Processing,” IEEE International Conference on International Symposium on Sustainable Energy, Signal Processing & Cyber Security (ISSSC-2020), GIET University, Gunupur, India, pp. 1-6, Feb. 2021, doi: 10.1109/iSSSC50941.2020.9358826.
  • 05 P. Mishra, T. Panda, S. S. Rout and G. Palai, “Investigation of a 16 channel 40 Gbps varied GVD DWDM system using dispersion compensating fiber,” IEEE International Conference on Computer Science, Engineering and Applications (ICCSEA 2020), GIET University, Gunupur, India, pp. 1-5, Jul. 2020, doi: 10.1109/ICCSEA49143.2020.9132934.
  • 06 R. K. Patjoshi, R. Panigrahi and S. S. Rout, “Nonlinear Variable Gain fuzzy with Enhanced PLL Based Modified SRF Approach for UPQC,” 1st IEEE International Conference on Energy, Systems and Information Processing, ICESIP 2019, Chennai, India, pp. 1-6, Dec. 2019, doi: 10.1109/ICESIP46348.2019.8938332.
  • 07 S. S. Rout and K. Sethi, “Current source helper based Gilbert mixer design,” 5th National Conference on Devices and Circuits-2019, IEEE ED-NIST Student Chapter, Berhampur, India, pp. 13-18, Mar. 2019, ISBN: 978-93-83060-12-2.
  • 08 M. K. Sukla, S. S. Rout and S. K. Behera, “Design of low power analog multiplexer for sensor interfacing,” 5th National Conference on Devices and Circuits-2019, IEEE ED-NIST Student Chapter, Berhampur, India, pp. 62-66, Mar. 2019, ISBN: 978-93-83060-12-2.
  • 09 S. S. Rout and K. Sethi, “A high conversion gain and low flicker noise Gilbert mixer design in 180 nm CMOS process,” 14th IEEE India Council International Conference (INDICON), IIT Roorkee, India, pp. 1-5, Dec. 2017, doi: 10.1109/INDICON.2017.8487552.
  • 10 S. S. Rout and K. Sethi, “Design of high gain and low noise CMOS Gilbert cell mixer for receiver front end design,” 15th IEEE International Conference on Information Technology (ICIT)-2016, IIIT, Bhubaneswar, India, pp. 1-5, Dec. 2016, doi: 10.1109/ICIT.2016.16.
  • 11 S. S. Rout, D. Tripathy, and K. Sethi, “An improved bulk injection cascode Mixer for receiver front end design,” 2nd National Conference on Devices and Circuits-2016, IEEE ED-NIST Student Chapter, Berhampur, India, pp. 37-41, Feb. 2016, ISBN: 978-93-82208-78-5.
  • 12 D. Tripathy, S. S. Rout and K. Sethi, “A low power noise cancelling LNA for UWB receiver front end,” 2015 IEEE Power, Communication and Information Technology Conference (PCITC), SOA University, Bhubaneswar, India, pp. 442-446, Oct. 2015, doi: 10.1109/PCITC.2015.7438206.

GLA University

17km Stone, NH-19,
Delhi-Mathura Road
P.O. Chaumuhan,
Mathura-281 406 (U.P.) India

Contact Us

+91-5662-250900,
250909, 241489,
+91-9927064017

Email: [email protected]

Admission Helpline

Click here to call our counsellor in your city.

Helpline No.

9027068068

Why GLA University

Media

Other Links

Admissions

Social Link

© 2026 - All Rights Reserved. Website Designed and Developed by Sterco Digitex

Admission Helpline 9027068068