Faculty

Admission Query

Mr. Anjan Kumar

  • Assistant Professor
    Institute of Engineering & Technology
  • Department

    Department of Electronics & Communications
  • Contact Details:

    Email : anjan.kuamr@gla.ac.in

    Contact Number :8449431935

  • Experience

    10.1 years Teaching/Research experience in the field of Electronics and communication engineering

  • Qualifications

    • M.Tech. (2012): Indian Institute of Information Technology and Management, Gwalior, M.P., India
    • B.Tech. (2006): School of Engineering, Cochin University of Science and Technology Kochi Kerala, India
  • Ph.D

    Thesis Supervised

  • Awarded/ Completed-

    Working-

  • Postgraduate

    Thesis Supervised

  • Awarded/ Completed02

    Working01

Research Publications

Journal

  • 1 Anjan Kumar, Shashikant Sharma, Manisha Pattanaik, and Balwinder Raj, " Forward Body Biased Multimode Multi-Threshold CMOS Technique for Ground Bounce Noise Reduction in Static CMOS Adders,"International Journal of Information and Electronics Engineering vol. 3, no. 6, pp. 567-572, 2013.
  • 2 Manisha Pattanaik, Anjan Kumar ,Balwinder Raj,and Shashikant Sharma and ,” Diode Based Trimode Multi-Threshold CMOS Technique for Ground Bounce Noise Reduction in Static CMOS Adders”, International Conference on Electronics, Nanomaterials and Components, Advanced Materials Research Journal, Vol. 548, pp. 885-889, China 2012.
  • 3 Alok Kumar, Gaurav Kumar Sharma, Anjan Kumar, *Tarun Agrawal and Vivek Srivastava “Design of energy efficient random access memory circuit using stub series terminated logic i/o standard on 28nm FPGA" Asian Journal of Science and Technology Vol. 06, Issue 08, pp. 1699-1706, August, 2015.

International Conferences

  • 1 Kumar,A. Sharma,S., Pattanaik,M, "Reactivation Noise Aware Data Preserving Multi-Mode MTCMOS Shift Register," International Conference on Computing, Communication and Networking Technologies (ICCCNT), 2012, pp.1,5, 26-28 July 2012
  • 2 Anjan Kumar, Shashikant Sharma and Manisha Pattanaik "A Novel Data Preserving Multi-Mode MTCMOS Shift Register for Ground Bounce Noise Minimization" Proceedings of IEEE 4th International Conference on Electronics Computer Technology, pp. 654-658, Kanyakumari, India, 2012.
  • 3 Dubey, R.; Kumar, A.; Pattanaik, M., "Design of low noise low power two stage CMOS operational amplifier using Equivalent Transistor Replacement Technique for health monitoring applications," International Conference on Computing, Communication and Networking Technologies (ICCCNT), 2014, pp.1,6, 11-13 July 2014.
  • 4 Dubey,R.; Kumar, A.; Pattanaik, M., "Design of low noise low power biopotential tunable amplifier using voltage controlled pseudo-resistor for biosignal acquisition applications," International Conference on Computing, Communication and Networking Technologies (ICCCNT), 2014, pp.1,5, 11-13 July 2014.
  • 5 Sneha Solanki, Anjan Kumar and Richa Dubey "Multimode MTCMOS technique for reactivation noise Minimization in 8T FULL adder circuit" 2016 6th IEEE International Conference on Communication Systems and Network Technologies (CSNT-2016) Chitkara University (Chandigarh)
  • 6 Sneha Solanki, Anjan Kumar and Richa Dubey "Stacked Transistor based multimode power efficient MTCMOS full adder design in 90nm CMOS technology" 6th IEEE International Conference on Communication and Signal Processing-(ICCSP'17) Melmaruvathur, TN.
  • 7 Shivangni Singh; Madhavika Agarwal; Neha Agrawal; Anjan Kumar; Bishwajeet Pandey " Simulation and Verification of Voltage and Capacitance Scalable 32-bit Wi-Fi Ah Channel Enable ALU Design on 40nm FPGA" International Conference on Computational Intelligence and Communication Networks (CICN) Year: 2015 , Pages: 1363 - 1366, DOI: 10.1109/CICN.2015.264
  • 8 Anjan Kumar ,Tarun Agrawal; Vivek Srivastava; "Designing of Power Efficient ROM Using LVTTL and Mobile-DDR IO Standard on 28nm FPGA" International Conference on Computational Intelligence and Communication Networks (CICN) Year: 2015 Pages: 1334 - 1337, DOI: 10.1109/CICN.2015.257
  • 9 Neha Agrawal; Madhavika Agarwal; Shivangni Singh; Anjan Kumar; Bishwajeet Pandey "Different I/O standard based Wi-Fi enable 32-bit ALU design on 90nm FPGA" 2015 Communication, Control and Intelligent Systems (CCIS) Year: 2015 Pages: 382 - 389, DOI: 10.1109/CCIntelS.2015.7437945
  • 10 Madhavika Agarwal; Shivangni Singh; Neha Agrawal; Anjan Kumar; Bishwajeet Pandey "Frequency scaling based thermally tolerable Wi-Fi Enable 32-bit ALU design on 90nm FPGA" 2015 Communication, Control and Intelligent Systems (CCIS) Year: 2015 ,Pages: 376 - 381, DOI: 10.1109/CCIntelS.2015.7437944

National Conference

  • 1 Shashikant Sharma, Anjan Kumar, Manisha Pattanaik and Balwinder Raj "Leakage Current and Ground Bounce Noise Aware Nano MTCMOS Adder Circuits" Proceedings of National Symposium on Recent Advances in Nano Science Engineering and Technology, ABV-IIITM Gwalior, India

Area of Research Interest

  • 1 Low Power/Low Voltage Electronics
  • 2 Characterization and Design of Low Power Logic and Memory
  • 3 Leakage Power Reduction and Ground Bounce Noise Reduction Techniques
  • 4 Power-Gated Arithmetic Circuits for Energy-Precision.
  • 5 Process Variation Aware Power Gating Techniques
  • 6 Distributed Data-Retention Power Gating Techniques for Embedded SRAM.
  • 7 Microprocessor and Micro-controller based system